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Robust design of deep-submicron digital circuits

Abstract : The design of circuits to operate at critical environments, such as those used in control-command systems at nuclear power plants, is becoming a great challenge with the technology scaling. These circuits have to pass through a number of tests and analysis procedures in order to be qualified to operate. In case of nuclear power plants, safety is considered as a very high priority constraint, and circuits designed to operate under such critical environment must be in accordance with several technical standards such as the IEC 62566, the IEC 60987, and the IEC 61513. In such standards, reliability is treated as a main consideration, and methods to analyze and improve the circuit reliability are highly required. The present dissertation introduces some methods to analyze and to improve the reliability of circuits in order to facilitate their qualification according to the aforementioned technical standards. Concerning reliability analysis, we first present a fault-injection based tool used to assess the reliability of digital circuits. Next, we introduce a method to evaluate the reliability of circuits taking into account the ability of a given application to tolerate errors. Concerning reliability improvement techniques, first two different strategies to selectively harden a circuit are proposed. Finally, a method to automatically partition a TMR design based on a given reliability requirement is introduced.
Keywords : TMR
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Submitted on : Monday, June 2, 2014 - 3:52:08 PM
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  • HAL Id : pastel-00998731, version 1



Gutemberg Goncalves dos Santos Junior Gonçalves dos Santos Junior. Robust design of deep-submicron digital circuits. Other. Télécom ParisTech, 2012. English. ⟨NNT : 2012ENST0039⟩. ⟨pastel-00998731⟩



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