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Bandwidth mismatch calibration in time-interleaved analog-to-digital converters

Abstract : Time-interleaved converter (ti-adc) is an efficient way to increase the speed while maintaining a good accuracy. it consists of the parallelization of several channels; each one running at lower speed. The benefit of this approach is to increase the conversion bandwidth without increasing the power. however, mismatches between the channels cause errors at the digital output and degrade the linearity and the resolution of the system. Gain, offset and clock skew errors are widely treated and we have been interested on bandwidth mismatch error which appears at high frequencies. The goal of the thesis is to develop and implement background calibration techniques for bandwidth mismatch error in a high speed ti-adc (up to 500 msps) in order to achieve a 90 db of sfdr for high input frequencies (up to 385mhz) and up to 94 db at low frequencies. An analog correction solution based on randomization was proposed and a new estimation technique based on gain extraction was implemented and validated for wideband signal.
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Submitted on : Monday, June 2, 2014 - 4:32:08 PM
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Fatima Ghanem. Bandwidth mismatch calibration in time-interleaved analog-to-digital converters. Other. Télécom ParisTech, 2012. English. ⟨NNT : 2012ENST0051⟩. ⟨pastel-00998759⟩



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