158 4.1 RF front-end ,
182 Publications and patents, p.186 ,
On-chip auto-calibrated RF tracking filter for cable silicon tuner, ESSCIRC 2008, 34th European Solid-State Circuits Conference, 2008. ,
DOI : 10.1109/ESSCIRC.2008.4681816
An RF front-end for multi-channel direct RF sampling cable receivers, 2011 Proceedings of the ESSCIRC (ESSCIRC), 2011. ,
DOI : 10.1109/ESSCIRC.2011.6044978
?Broadband digitization for cable tuners front-end?, EuMC ,
Design, optimization and calibration of an HFB-based ADC, 2011 IEEE 9th International New Circuits and systems conference, 2011. ,
DOI : 10.1109/NEWCAS.2011.5981319
URL : https://hal.archives-ouvertes.fr/hal-00766542
?Broadband RF multi-channel cable receiver based on direct RF sampling? ; presentation to ?Journées de la Radio Intelligente, Cognitive et Opportuniste?, 2011. ,
?RF Direct-Sampling for Cable Multi-Channel Transceiver?; presentation to ?Gdr SoC-SiP?, Lip6 Jussieu References, 2012. ,
?Adaptive digital receivers for analog front-end mismatch correction?, Vehicular Technology Conference, 2001. ,
CMOS mixers and polyphase filters for large image rejection, IEEE Journal of Solid-State Circuits, vol.36, issue.6, 2001. ,
DOI : 10.1109/4.924850
Adaptive self-calibrating image rejection receiver, 2004 IEEE International Conference on Communications (IEEE Cat. No.04CH37577), 2004. ,
DOI : 10.1109/ICC.2004.1313027
A low-IF CMOS double quadrature mixer exhibiting 58 dB of image rejection for silicon TV tuners, RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE Radio Frequency integrated Circuits, 2005. ,
DOI : 10.1109/RFIC.2005.1489621
Luns Tee; King-Chun Tsai; Cheol-Woong Lee; Gray, P.R.: ?A 1.75-GHz highly integrated narrow-band CMOS transmitter with harmonic-rejection mixers?, IEEE Journal of Solid-State Circuits, pp.36-48, 2001. ,
Seong-Sik Song; Hong-Teuk Kim; Kwyro Lee, ?A CMOS Harmonic Rejection Mixer With Mismatch Calibration Circuitry for Digital TV Tuner Applications?, IEEE Microwave and Wireless Components Letters, 2008. ,
A generalization of nonuniform bandpass sampling, IEEE Transactions on Signal Processing, vol.43, issue.3, 1995. ,
DOI : 10.1109/78.370623
?Second-order sampling of wideband signals?ADC Performance Survey, IEEE International Symposium on Circuits and Systems, 1997. ,
Facimile Telegraph System, U.S. Patent, vol.1608527, 1921. ,
?CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters?, 2003. ,
Pons, V.; ?A 1.8-V 1.6-GSample/s 8-b self-calibrating folding ADC with 7.26 ENOB at Nyquist frequency?, IEEE Journal of Solid-State Circuits, 2004. ,
Pala C.; ?Time Interpolation Flash ADC Having Automatic Feedback Calibration?, 2008. ,
A pipelined 5-Msample/s 9-bit analog-to-digital converter, IEEE Journal of Solid-State Circuits, vol.22, issue.6, 1987. ,
DOI : 10.1109/JSSC.1987.1052843
?A 1.2V 10b 20MSample/s non-binary successive approximation ADC in 0.13?m CMOS?; IEEE International Solid-State Circuits Conference, 2002. ,
?A 65fJ/Conversion-Step 0-to-50MS/s 0-to-0, 7mW 9b Charge-Sharing SAR ADC in 90nm Digital CMOS?, IEEE International Solid-State Circuits Conference, 2007. ,
Delta Modulation: A Method of PCM Transmission Using the One Unit Code, Phillips Research Reports, vol.7, 1952. ,
?Optimal parameters for ΔΣ modulator topologies?, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1998. ,
?Robust Sigma Delta Converters and their application in low-power highly-digitized flexible receivers?, 2010. ,
Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey, IEEE Transactions on Circuits and Systems I: Regular Papers, 2011. ,
DOI : 10.1109/TCSI.2010.2097652
A.; ?Time interleaved converter arrays?, IEEE Journal of Solid-State Circuits, 1980. ,
URL : https://hal.archives-ouvertes.fr/in2p3-00010761
?A 20 GS/s 8 b ADC with a 1 MB memory in 0, 18 ?m CMOS?, IEEE International Solid-State Circuits Conference, 2003. ,
A Multi-Standard Analog and Digital TV Tuner for Cable and Terrestrial Applications, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 2007. ,
DOI : 10.1109/ISSCC.2007.373368
Design considerations for direct-conversion receivers, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1997. ,
DOI : 10.1109/82.592569
Compensation of frequency-selective I/Q imbalances in wideband receivers: models and algorithms, 2001 IEEE Third Workshop on Signal Processing Advances in Wireless Communications (SPAWC'01). Workshop Proceedings (Cat. No.01EX471), 2001. ,
DOI : 10.1109/SPAWC.2001.923837
A 48-860MHz digital cable tuner IC with integrated RF and IF selectivity, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC., 2003. ,
DOI : 10.1109/ISSCC.2003.1234379
SiP Tuner With Integrated <emphasis>LC</emphasis> Tracking Filter for Both Cable and Terrestrial TV Reception, IEEE Journal of Solid-State Circuits, vol.42, issue.12, 2007. ,
DOI : 10.1109/JSSC.2007.908666
A 48-to-860MHz CMOS Direct-Conversion TV Tuner, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 2007. ,
DOI : 10.1109/ISSCC.2007.373366
?A 40MHz-to-1GHz fully integrated multistandard silicon tuner in 80nm CMOS?; IEEE International Solid-State Circuits Conference, 2012. ,
A New Direct-Conversion Radio Chip Set Eliminates IF Stages? Analog Dialogue, 1999. ,
Tired, T. ; ?Highly integrated direct conversion receiver for GSM/GPRS/EDGE with on-chip 84-dB dynamic range continuous-time ?? ADC?, IEEE Journal of Solid- State Circuits, 2005. ,
Cognitive Radio Design Challenges and Techniques, IEEE Journal of Solid-State Circuits, vol.45, issue.8, 2010. ,
DOI : 10.1109/JSSC.2010.2049790
Sivonen P.; Pärssinen A.; ?A 900-MHz Direct Delta-Sigma Receiver in 65-nm CMOS?, IEEE Journal of Solid-State Circuits, 2010. ,
?An alternative approach to the realizations of network functions: N-path filter,? Bell Syst, Tech. J, pp.1321-1350, 1960. ,
A 1-to-4 Channel Receiver for WCDMA Base-Station Applications, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006, 2006. ,
DOI : 10.1109/RFIC.2006.1651079
Jianhong Xiao, Dongsoo Koh; Hung, B.J.-J ,
Lin He, IEEE Journal of Solid-State Circuits, 2009. ,
?Relationship between ADC performance and requirements of digital-IF receiver for WCDMA base-station?, IEEE Transactions on Vehicular Technology, 2003. ,
Murden F.; ?A New Paradigm For Base Station Receivers: High IF Sampling + Digital Filtering?; Radio Frequency Integrated Circuits (RFIC) Symposium, 1997. ,
Design and RF-Sampling Front-Ends for Flexible Wireless Receivers? ,
Non-decimation FIR filter for digital RF sampling receiver with wideband operation capability, 2009 IEEE Radio Frequency Integrated Circuits Symposium, 2009. ,
DOI : 10.1109/RFIC.2009.5135586
A Wideband Digital RF Receiver Front-End Employing a New Discrete-Time Filter for m-WiMAX, IEEE Journal of Solid-State Circuits, vol.47, issue.5, p.2012 ,
DOI : 10.1109/JSSC.2012.2185529
?The Experimental Demonstration of a SASP-Based Full Software Radio Receiver?, IEEE Journal of Solid-State Circuits, 2010. ,
?A 0.13-um 1-GS/s CMOS Discrete-Time FFT Processor for Ultra-Wideband OFDM Wireless Receivers?, IEEE Transactions on Microwave Theory and Techniques, 2011. ,
A high performance HF software radio, 8th International Conference on High-Frequency Radio Systems and Techniques, 2000. ,
DOI : 10.1049/cp:20000183
?Overcoming Converter Nonlinearities with Dither?; Analog Devices Application Note ,
Design and implementation of a direct digitization GPS receiver front end, IEEE Transactions on Microwave Theory and Techniques, vol.44, issue.12, 1996. ,
DOI : 10.1109/22.554550
Direct bandpass sampling of multiple distinct RF signals, IEEE Transactions on Communications, vol.47, issue.7, 1999. ,
DOI : 10.1109/26.774848
?Hybrid filter banks for analog/digital conversion?, 1997. ,
Two-channel digital and hybrid analog/digital multirate filter banks with very low-complexity analysis or synthesis filters, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol.50, issue.7, 2003. ,
DOI : 10.1109/TCSII.2003.813589
Influences of oversampling and analog imperfections on Hybrid Filter Bank A/D converters, 2006 49th IEEE International Midwest Symposium on Circuits and Systems, 2006. ,
DOI : 10.1109/MWSCAS.2006.382011
URL : https://hal.archives-ouvertes.fr/hal-00261344
Design, optimization and calibration of an HFB-based ADC, 2011 IEEE 9th International New Circuits and systems conference, 2011. ,
DOI : 10.1109/NEWCAS.2011.5981319
URL : https://hal.archives-ouvertes.fr/hal-00766542
Multi-Band Digital-RF Receiver, IEEE Transactions on Applied Superconductivity, vol.21, issue.3, 2011. ,
DOI : 10.1109/TASC.2010.2098012
?RF-to-Baseband Digitization in 40 nm CMOS With RF Bandpass Modulator and Polyphase Decimation Filter?, IEEE Journal of Solid-State, 2012. ,
?Broadband digitization for cable tuners front-end?, EuMC), 2011. ,
05): ?Digital Video Broadcasting (DVB); Measurement guidelines for DVB systems [69] ?Data Over Cable Service Interface Specifications DOCSIS 3.0?, Physical Layer Specification CM-SP- PHYv3.0-I09-101008, Cablelabs [70] ?Data-Over-Cable Service Interface Specifications DOCSIS 3.0, Physical Layer Interface Acceptance Test Plan?, ETSI TR 101 290 V1.2.1, 2001. ,
?Discrete-time Signal Processing?, 1989. ,
A necessary and sufficient condition for quantization errors to be uniform and white, IEEE Transactions on Acoustics, Speech, and Signal Processing, vol.25, issue.5, p.25, 1977. ,
DOI : 10.1109/TASSP.1977.1162977
Ming-Chang L.; ?Statistical theory of quantization?, IEEE Transactions on Instrumentation and Measurement, 1996. ,
?Wideband A/D Converter Front-End Design Considerations -When to Use a Double Transformer Configuration? ,
?ADC Noise Figure?An Often Misunderstood and Misinterpreted Specification? ,
?Digital Signal Processing In Continuous Time: A Possibility For Avoiding Aliasing And Reducing Quantization Error?, 2004. ,
?Noise Power Ratio (NPR)?A 65-Year Old Telephone System Specification Finds New Life in Modern Wireless Applications? ,
?The Noise Power Ratio?Theory and ADC Testing?, Instrumentation and Measurement Technology Conference, 1999. ,
Noise Figures of Radio Receivers, Proc. IRE, pp.419-422, 1944. ,
DOI : 10.1109/JRPROC.1944.232049
?A 480 mW 2.6 GS/s 10b Time- Interleaved ADC With 48.5 dB SNDR up to Nyquist in 65 nm CMOS?, Solid-State Circuits, IEEE Journal, 2011. ,
Fregeais Y.; ?An 11b 3.6GS/s Time-Interleaved SAR ADC in 65nm CMOS? ,
The Impact of Combined Channel Mismatch Effects in Time-Interleaved ADCs, IEEE Transactions on Instrumentation and Measurement, vol.54, issue.1, 2005. ,
DOI : 10.1109/TIM.2004.834046
?Impact of Random Channel Mismatch on the SNR and SFDR of Time-Interleaved ADCs?, Circuits and Systems I: Regular Papers, IEEE Transactions on, vol.51, issue.1, 2004. ,
?Jitter requirements of the sampling clock in software Radio receivers?, Circuits and Systems II: Express Briefs, IEEE Transactions, vol.53, issue.2, 2006. ,
?Phase Noise Model of Single Loop Frequency Synthesizer?, Broadcasting, IEEE Transactions on, vol.54, issue.1, 2008. ,
Phase Noise Effects on Square-QAM Symbol Error Rate Performance, 2004. ,
?Sampled systems and the effects of clock phase noise and jitter?, www.analog.com [94] Stott J., ?The Effects Of Phase Noise in COFDM?, 1998. ,
?Little known characteristics of phase noise? ,
An RF front-end for multi-channel direct RF sampling cable receivers, 2011 Proceedings of the ESSCIRC (ESSCIRC), 2011. ,
DOI : 10.1109/ESSCIRC.2011.6044978
SiP Tuner With Integrated <emphasis>LC</emphasis> Tracking Filter for Both Cable and Terrestrial TV Reception, IEEE Journal of Solid-State Circuits, vol.42, issue.12, p.2809, 2007. ,
DOI : 10.1109/JSSC.2007.908666
Milovanovic and Zlatoljub D. Milosavljevic, ?Fixed and variable slope catv amplitude equalizers?, Applied Microwave & Wireless, Feb, vol.78, pp.76-80, 1998. ,
?Variable slope network for off-premises CATV system?, p.267, 1990. ,
A Full-Band processor for reduction of RF mixer LO harmonic images, Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, p.2012 ,
DOI : 10.1109/CICC.2012.6330614