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Design of wideband high-resolution low-pass continuous-time delta-sigma modulators in CMOS process

Abstract : The market of A/D converters can be segmented in two categories. From one side we distinguish the Intellectual Property (IP) blocks that are generally optimized for a specific application. On the other side, the general-purpose discrete Integrated Circuits (ICs) that are designed such as they could be used in different applications. This thesis work deals with the second category. It is part of a research and development program initiated in 2010 in the European project FP7 SACRA, whose purpose was to study the feasibility of a delta-sigma (DS) analog-to-digital converter that could compete with the pipeline architecture for applications that require high bandwidth (≥10MHz) and high resolution (>10-bit) such as medical imaging, wireless and wireline communications, video or instrumentation. Currently, the pipeline is still largely predominant for such applications and the few commercial wideband solutions based on a DS architecture have a signal bandwidth limited to 10 MHz or 25 MHz while consuming respectively 100mW and 20mW for an ENOB around 12-bit. This manuscript summarizes the design, fabrication and measurement of a low-pass CT DS modulator with a signal bandwidth of 40MHz, while targeting an effective resolution of 12-bit and a power consumption of less than 100mW.
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Submitted on : Wednesday, October 26, 2016 - 10:10:06 AM
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  • HAL Id : tel-01387774, version 1



Hussein Fakhoury. Design of wideband high-resolution low-pass continuous-time delta-sigma modulators in CMOS process. Electronics. Télécom ParisTech, 2014. English. ⟨NNT : 2014ENST0088⟩. ⟨tel-01387774⟩



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